The present invention relates to a digital-to-analog converter.
FIG. 6 is a view showing the structure of a conventional digital-to-analog converter. The converter divides input digital data of N bits into M high order bits and (N-M) low order bits. The M high order bits are input to a digital-to-analog converter 12 for high order bits, and the (N-M) low order bits are input to a digital-to-analog converter 20 for low order bits. The digital-to-analog converter 12 for high order bits comprises: a string of 2.sup.M resistors 3 to 8 (resistor string) for high order bits, which are unit resistors Rm series-connected to each other between a first reference voltage VR1 (10) and a second reference voltage VR2 (11); 2.sup.M switch circuits 2 each of which is designed to select one of divided voltages which are obtained by dividing the voltage between the first reference voltage VR1 (10) and the second reference voltage VR2 (11) by means of a respective one of the 2.sup.M resistors 3 to 8; and a decoder 1 for outputting a selection signal for selecting one of the 2.sup.M switches 2 which corresponds to the input M-bit digital data. A resistor element Rc 9 is a resistor element for adjustment.
The digital-to-analog converter 20 for low order bits comprises: a string of 2.sup.(N-M) resistors 15 to 19 for low order bits which are unit resistors Rs connected in parallel with both the ends of the unit resistor Rm (8), and which are series-connected to each other; 2.sup.(N-M) switch circuits 14 each of which is designed to select one of divided voltages which are obtained by dividing the voltage between the first reference voltage VR1 (10) and the second reference voltage VR2 (11) by means of a respective one of the 2.sup.(N-M) resistors 15 to 19; and a decoder 13 for outputting a selection signal for selecting one of the 2.sup.(N-M) switches 14 which corresponds to the input (N-M)-bit digital data.
In the conventional digital-to-analog converter having the above structure, the digital-to-analog converter 12 outputs an analog output having an M-bit resolution, and the digital-to-analog converter 20 outputs an analog output having an (N-M)-bit resolution.
Those analog outputs are added by an analog adder 21, thereby obtaining an analog output having an N-bit resolution between the first reference voltage VR1 (10) and the second reference voltage VR2 (11).
By virtue of the above structure, in order to obtain an analog output having an N-bit resolution, the number of unit resistors and that of switch circuits can be reduced greatly, as compared with the case where an analog output having an N-bit resolution is obtained with one digital-to-analog converter. Accordingly, the above conventional digital-to-analog converter can be easily incorporated into a chip and manufactured at a low cost.
More specifically, in order to obtain an analog output having a 12-bit resolution, for example, the above conventional digital-to-analog converter differs from a circuit using only one digital-to-analog converter as follows:
The circuit using only one digital-to-analog converter needs 4096 (2.sup.12) unit resistors and 4096 switch circuits respectively associated with the unit resistors. On the other hand, the aforementioned conventional digital-to-analog converter has only 128 (2.sup.6 .times.2) unit resistors (64 units resistors for high order bits plus 64 units resistors for low order bit) plus 128 switch circuits respectively associated with the unit resistors, if the input data is divided into 6 high order bits and 6 low order bits.
In such a manner, when the input data is divided into two, i.e., high order bits and low order bits, or three, the number of structural elements provided in the circuit is far smaller than that of structural elements of the circuit having one digital-to-analog converter. However, the above conventional digital-to-analog converter has the following disadvantages:
First, the analog output of the conventional digital-to-analog converter has bad linearity.
The linearity of the analog output is important for a resistor string type of digital-to-analog converter (which uses a string of resistors). It is influenced by the variance in resistance value among the unit resistors if the circuit has only digital-to-analog converter. In contrast, the conventional digital-to-analog converter which divides the input data into two further error factors worsening the linearity function, in addition to the variance in resistance value among the unit resistors. To be more specific, one of the unit resistors Rm for high order bits, which is connected in parallel with the resistor string for low order bits, is lower in resistance value than each of the other unit resistors Rm for high order bits. Due to this, the resistor Rc for adjustment is connected in series to said one of the unit resistors Rm. Its resistance needs to be adjusted such that the total resistance of said one of the unit resistors Rm, the resistor Rc for adjustment and the resistor string for low order bits is equal to the resistance of each of the other unit resistors Rm for high order bits.
Furthermore, in the conventional digital-to-analog converter, the linearity is greatly influenced by the resistances of the resistor Rc for adjustment and the resistor Rm connected in parallel with the resistor string for low order bits. This will be explained in detail as follows:
FIGS. 5A and 5B show conversion characteristics of the conventional digital-to-analog converter.
As shown in FIG. 5A, ideal digital-to-analog conversion characteristics represented by a line 62 in FIG. 5A cannot be obtained, and an error voltage Verror is generated at the turn from conversion of high order bits to conversion of low order bits, as shown in a two-dot chain line 63, when the total resistance of the resistor Rc and the unit resistor Rm for high order bits connected in parallel with the resistor string for low order bits is smaller than each of the other resistors Rm for high order bits.
Also, when the above total resistance is greater than each of the other resistors Rm for high order bits, ideal digital-to-analog conversion characteristics represented by a line 65 cannot be obtained, and an error voltage Verror represented by a two-dot chain line 64 is generated, thus losing the linearity.
Such a disadvantage gives rise to a problem in the case where the digital-to-analog converter is incorporated into an LSI chip or the like. In the case of doing so, in order resistors be formed to have the same resistance, they are formed to have the same shape, although they are formed in different manufacturing processes. As a result, their relative resistance values do not vary, even if their absolute resistance values vary. However, in the conventional digital-to-analog converter, it is difficult to reduce the variance in relative resistance values among the unit resistors Rm, since the resistor Rc for adjustment is needed for the unit resistor Rm for high order bits connected in parallel with the resistor string for low order bits.
In such a manner, in the conventional digital-to-analog converter, the variance in relative resistance value is hard to reduce. Thus, the converter cannot maintain the linearity of the analog output, although the number of the unit resistors and that of the switch circuits can be reduced greatly.
Furthermore, in order for digital-to-analog conversion to be performed with a high precision, the conventional digital-to-analog converter requires adjustment by trimming or the like after it is manufactured, which is troublesome.
In addition, the operating speed of a resistor string type of digital to analog converter depends on the output impedance of the resistor string. Thus, the operating speed of the conventional digital to analog converter of a resistor string type is limited due to the output impedance of the resistor string for low order bits, since the output impedance of the resistor string for low order bits is higher than that of the resistor string for high order bits. The output impedance of the resistor string for low order bits cannot be easily decreased from the standpoint of structure. In this point, the conventional digital-to-analog converter cannot be designed to operate at a higher speed.